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6–2
Chapter 6: Board Test System
Introduction
A GUI runs on the PC which communicates over the JTAG bus to a test design
running in the Arria II GX device. Figure 6–1 shows the initial GUI for a board that is
in the factory configuration.
Figure 6–1. Board Test System Graphical User Interface
Several designs are provided to test the major board features. Each design provides
data for one or more tabs in the application. The Configure menu identifies the
appropriate design to download to the FPGA for each tab.
After successful FPGA configuration, the appropriate tab appears and allows you to
exercise the related board features. Highlights appear in the board picture around the
corresponding components.
The Power Monitor button starts the Power Monitor application that measures and
reports current power information for the board. Because the application
communicates over the JTAG bus to the MAX II device, you can measure the power of
any design in the FPGA, including your own designs.
Arria II GX FPGA Development Kit, 6G Edition User Guide
July 2010 Altera Corporation
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